Description
We should investigate if there is a performance gain in using intel CRC32 instruction which was introduced in SSE 4.2 (Nehalem).
Even if this is something we will not do now, we should ensure that the polynomial we use is the same as Intel one: 0x11EDC6F41 (or 0x1EDC6F41 without the high order bit) so we can implement this later without changing the file format.
See page 61 in Intel® SSE4 Programming Reference for more details.
AMD supports it too see page 155 in the Architecture Programmer’s Manual